My wife has been at Company X for about nine months now, and is undergoing a process that is known as 'tape out'. It is a time of extreme stress.
After a computer chip has been designed, the plans are sent off to a fabrication plant for samples to be made. These are then received back and tested before going to production. Unfortunately fabrication is a time-consuming process and production slots have to be booked many months' in advance. This all adds up to a wait of many months to see if your chip works; if it does not then you have to find the fault, fix it and go through the whole hellish process once again.
This means that it is important for the plans that are sent to the fabrication plant is as near perfect as possible. I am lucky; in software we can almost always do a change and see the effects of that change within a few minutes. In my wife's job it can take months and cost a small fortune.
I once was involved with a team of people working on a digital chip. The first ten samples came back from the fabrication plant on a Monday morning; no time was wasted in placing some into test boards. The news quickly spread: they were Dead On Arrival and would not even power up. I watched during the week as the engineers got increasingly frantic until, on the Thursday afternoon, they discovered the problem. The fault was not with the design but with the manufacture (*). I have rarely seen engineers more highly stressed.
So what is '
tape out'? Imagine a chip as being a bunch of lines representing the circuits. The final plans of a chip form a spaghetti-like mess of interconnecting lines called a 'mask'. In the early days of silicon chips the scale was so large that the mask could be altered by simply adding black sticky tape - you literally got the tape out. Although modern techniques have long outgrown this method the term is still used to represent the point at which the chip is finally designed.
Tape-out is an incredible stressful period for everyone involved. Any mistakes that are left after that stage may not be found for many months, delay the project by many more and cost hundreds of thousands, if not millions, of pounds. Incredibly intelligent people have left the industry because they cannot cope with the stress of tape-out and the wait for the chips to return. To compensate, tape-out is also a time of slap-up dinners for the development team and
any hangers-on who might come along :-)
The construction of a chip is an immensely complex process; terms such as
photolithography, finite barrier quantum wells and valence bands all add up to form a nearly-impenetrable barrier to comprehension. This is true for the design of digital chips; it is triply so for designers of analogue chips such as my wife. Digital chips are digital; they belong in the domain of ones and zeroes. Analogue chips are variable and utterly indeterminate; they are designed by magicians and witches.
So this note is a rather long-winded way to say to my wife how much I am so proud of her, how much I am amazed by what she does for a job. Not only is she a witch, but she is a damned good witch.
And not many husbands could get away with saying that...
(*) The silicon part of a chip sits in a piece of material (often plastic) called packaging that connects it to the outside world. The chips had been packaged 90 degrees out of orientation, meaning that the pins did not line up. It was someone else's problem and, even better, it was easy to fix...
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